The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of the IC evolution, functional density (defined as the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. A scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. But, such scaling down has increased the complexity of processing and manufacturing ICs. For these advances to be realized, similar developments in IC manufacturing are needed.
However, since feature sizes continue to decrease, fabrication processes continue to become more complex. For example, via structures are frequently used for the decreased feature sizes. Therefore, it is a challenge to form reliable semiconductor devices at smaller and smaller sizes.